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MM74HC4538 Dual Retriggerable Monostable Multivibrator
February 1984 Revised August 2000
MM74HC4538 Dual Retriggerable Monostable Multivibrator
General Description
The MM74HC4538 high speed monostable multivibrator (one shots) is implemented in advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each multivibrator features both a negative, A, and a positive, B, transition triggered input, either of which can be used as an inhibit input. Also included is a clear input that when taken low resets the one shot. The MM74HC4538 is retriggerable. That is, it may be triggered repeatedly while their outputs are generating a pulse and the pulse will be extended. Pulse width stability over a wide range of temperature and supply is achieved using linear CMOS techniques. The output pulse equation is simply: PW = 0.7(R)(C) where PW is in seconds, R is in ohms, and C is in farads. This device is pin compatible with the CD4528, and the CD4538 one shots. All inputs are protected from damage due to static discharge by diodes to VCC and ground.
Features
s Schmitt trigger on A and B inputs s Wide power supply range: 2-6V s Typical trigger propagation delay: 32 ns s Fanout of 10 LS-TTL loads s Low input current: 1 A max
Ordering Code:
Order Number MM74HC4538M MM74HC4538SJ MM74HC4538N Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Truth Table
Inputs Clear L X X H H A X H X L B X X L Q L L Outputs Q H H
H
H = HIGH Level L = LOW Level = Transition from LOW-to-HIGH = Transition from HIGH-to-LOW = One HIGH Level Pulse = One LOW Level Pulse X = Irrelevant

L

H

(c) 2000 Fairchild Semiconductor Corporation
DS005217
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MM74HC4538
Block Diagrams
Note: Pin 1 and Pin 15 must be hard-wired to GND.
Logic Diagram
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MM74HC4538
Timing Diagram
Circuit Operation
The MM74HC4538 operates as follows (refer to logic diagram). In the quiescent state, the external timing capacitor, CX, is charged to VCC. When a trigger occurs, the Q output goes HIGH and CX discharges quickly to the lower reference voltage (VREF Lower = 1/3 VCC ). CX then charges, through RX, back up to the upper reference voltage (VREF Upper = 2/3 VCC), at which point the one-shot has timed out and the Q output goes LOW. The following, more detailed description of the circuit operation refers to both the logic diagram and the timing diagram. QUIESCENT STATE In the quiescent state, before an input trigger appears, the output latch is HIGH and the reset latch is HIGH (#1 in logic diagram). Thus the Q output (pin 6 or 10) of the monostable multivibrator is LOW (#2, timing diagram). The output of the trigger-control circuit is LOW (#3), and transistors M1, M2, and M3 are turned off. The external timing capacitor, CX, is charged to VCC (#4), and the upper reference circuit has a LOW output (#5). Transistor M4 is turned ON and transmission gate T1 is turned OFF. Thus the lower reference circuit has VCC at the noninverting input and a resulting LOW output (#6). In addition, the output of the trigger-control reset circuit is LOW.
TRIGGER OPERATION The MM74HC4538 is triggered by either a rising-edge signal at input A (#7) or a falling-edge signal at input B (#8), with the unused trigger input and the Reset input held at the voltage levels shown in the Truth Table. Either trigger signal will cause the output of the trigger-control circuit to go HIGH (#9). The trigger-control circuit going HIGH simultaneously initiates three events. First, the output latch goes LOW, thus taking the Q output of the HC4538 to a HIGH State (#10). Second, transistor M3 is turned on, which allows the external timing capacitor, CX, to rapidly discharge toward ground (#11). (Note that the voltage across CXappears at the input of the upper reference circuit comparator.) Third, transistor M4 is turned off and transmission gate T1 is turned ON, thus allowing the voltage across CX to also appear at the input of the lower reference circuit comparator. When CX discharges to the reference voltage of the lower reference circuit (#12), the outputs of both reference circuits will be HIGH (#13). The trigger-control reset circuit goes HIGH, resetting the trigger-control circuit flip-flop to a LOW State (#14). This turns transistor M3 OFF again, allowing CX to begin to charge back up toward VCC, with a time constant t = RXCX (#15). In addition, transistor M4 is turned ON and transmission gate T1 is turned OFF. Thus a high voltage level is applied to the input of the lower reference circuit comparator, causing its output to go LOW (#16). The monostable multivibrator may be retriggered at any time after the trigger-control circuit goes LOW. When CX charges up to the reference voltage of the upper reference circuit (#17), the output of the upper reference circuit goes LOW (#18). This causes the output latch to 3 www.fairchildsemi.com
MM74HC4538
Circuit Operation
RESET OPERATION
(Continued) toggle, taking the Q output of the HC4538 to a LOW State (#19), and completing the time-out cycle.
A low voltage applied to the Reset pin always forces the Q output of the HC4538 to a LOW State. The timing diagram illustrates the case in which reset occurs (#20) while CX is charging up toward the reference voltage of the upper reference circuit (#21). When a reset occurs, the output of the reset latch goes LOW (#22), turning ON transistor M1. Thus CX is allowed to quickly charge up to VCC (#23) to await the next trigger signal. Recovery time is the required delay after reset goes inactive to a new trigger rising edge. On the diagram it is shown as (#26) to (#27). RETRIGGER OPERATION In the retriggerable mode, the HC4538 may be retriggered during timing out of the output pulse at any time after the trigger-control circuit flip-flop has been reset (#24). Because the trigger-control circuit flip-flop resets shortly after CX has discharged to the reference voltage of the lower reference circuit (#25), the minimum retrigger time, trr is a function of internal propagation delays and the discharge time of CX:
device is powered down, the capacitor may discharge from VCC through the input protection diodes at pin 2 or pin 14. Current through the protection diodes must be limited to 30 mA; therefore, the turn-off time of the VCC power supply must not be faster than t = VCC*CX/(30 mA). For example, if VCC = 5V and CX = 15 F, the VCC supply must turn OFF no faster than t = (15V)*(15 F)/30 mA = 2.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of VCC to zero volts occurs, the MM74HC4538 may sustain damage. To avoid this possibility, use an external clamping diode, DX, connected from VCC to the CX pin. SET UP RECOMMENDATIONS Minimum Minimum RX = 1 k CX = 0 pF.
at room temperature POWER-DOWN CONSIDERATIONS Large values of CX may cause problems when powering down the MM74HC4538 because of the amount of energy stored in the capacitor. When a system containing this
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MM74HC4538
Absolute Maximum Ratings(Note 1)
(Note 2) Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) (Soldering 10 seconds) 260C 600 mW 500 mW
Recommended Operating Conditions
Min Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times (Reset only) (tr, tf) VCC = 2.0V VCC = 4.5V VCC = 6.0V 1000 500 400 ns ns ns 2 0 Max 6 VCC Units V V
-0.5 to +7.0V -1.5 to VCC +1.5V -0.5 to VCC +0.5V 20 mA 25 mA 50 mA -65C to +150C
-40
+85
C
Note 1: Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation Temperature Derating: Plastic "N" Package: - 12mW/C from 65C to 85C.
DC Electrical Characteristics
Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output VIN = VIH or VIL Voltage |IOUT| 20 A
(Note 4)
VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0 4.5 6.0 TA = 25C Typ 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.98 5.48 0 0 0 0.1 0.1 0.1 0.26 0.26 0.1 0.1 TA = -40 to 85C TA = -55 to 125C Guaranteed Limits 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1.0 1.0 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1.0 1.0 Units V V V V V V V V V V V V V V V V A A
Conditions
VIN = VIH or VIL |IOUT| 4.0 mA |IOUT| 5.2 mA VOL Maximum LOW Level Output VIN = VIH or VIL Voltage |IOUT| 20 A VIN = VIH or VIL |IOUT| 4.0 mA |IOUT| 5.2 mA IIN IIN ICC Active ICC Maximum Input Current (Pins 2, 14) (Note 5) Maximum Input Current (all other pins) Maximum Active Supply Current Maximum Quiescent Supply Pins 2, 14 = 0.5 VCC Q1, Q2 = HIGH VIN = V CC or GND Pins 2, 14 = OPEN Q1, Q2 = LOW VIN = V CC or GND
Note 4: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
4.5V 6.0V 2.0V 4.5V 6.0V 4.5V 6.0V 6.0V 6.0V
VIN = VCC or GND VIN = VCC or GND
6.0V
150
250
400
A
Quiescent Current
6.0V
130
220
350
A
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MM74HC4538
DC Electrical Characteristics
1. 2. 3.
(Continued) Clear H H H A L H L B H H H
Note 5: The device must be set up with 3 steps before measuring IIN:
AC Electrical Characteristics
VCC = 5V, TA = 25 C, CL = 15 pF, tr = tf = 6 ns Symbol tPLH tPHL tPHL tPLH tW Parameter Maximum Propagation Delay A, or B to Q Maximum Propagation Delay A, or B to Q Maximum Propagation Delay Clear to Q Maximum Propagation Delay Clear to Q Minimum Pulse Width A, B or Clear Conditions Typ 23 26 23 26 10 Limit 45 50 45 50 16 Units ns ns ns ns ns
AC Electrical Characteristics
CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol tPLH Parameter Maximum Propagation Delay A, or B to Q tPHL Maximum Propagation Delay A, or B to Q tPHL Maximum Propagation Delay Clear to Q tPLH Maximum Propagation Delay Clear to Q tTLH, tTHL Maximum Output Rise and Fall Time tr , tf Maximum Input Rise and Fall Time (Reset only) tW Minimum Pulse Width A, B, Clear tREC Minimum Recovery Time, Clear Inactive to A or B tWQ Output Pulse Width CX = 12 pF RX = 1 k Max tWQ Output Pulse Width CX = 100 pF RX = 10 k Max Min Min Conditions VCC 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V 3.0V 5.0V 3.0V 5.0V 3.0V 5.0V 3.0V 5.0V 283 147 283 147 1.2 1.0 1.2 1.0 -5 TA=25C Typ 100 25 21 110 28 23 100 25 21 110 28 23 30 10 8 250 50 43 275 55 47 250 50 43 275 55 47 75 15 13 1000 500 400 80 16 14 0 0 0 190 120 400 185 TA=-40 to 85C TA = -55 to 125C 315 63 54 347 69 59 315 63 54 347 69 59 95 19 16 1000 500 400 101 20 17 0 0 0 373 75 63 410 82 70 373 75 63 410 82 70 110 22 19 1000 500 400 119 24 20 0 0 0 Guaranteed Limits Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s s s s
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MM74HC4538
AC Electrical Characteristics
Symbol tWQ Parameter Output Pulse Width
(Continued)
TA=25C Typ 10.5 10.0 10.5 10.0 9.4 9.3 11.6 10.7 0.63 0.77 25 5 10 10 10 0.602 0.798 0.595 0.805 TA=-40 to 85C TA = -55 to 125C
Conditions CX = 1000 pF RX = 10 k Max Min
VCC 3.0V 5.0V 3.0V 5.0V 5.0V 5.0V
Units s s s s ms ms pF pF pF
Guaranteed Limits
tWQ CIN CIN CPD tWQ
Output Pulse Width Maximum Input Capacitance (Pins 2 & 14) Maximum Input Capacitance (other inputs) Power Dissipation Capacitance (Note 6) Pulse Width Match Between Circuits in Same Package
CX = 0.1F RX = 10k
Min Max
(per one shot)
150
1
%
Note 6: CPD determines the no load dynamic consumption, PD = CPD VCC2f+ICC VCC, and the no load dynamic current consumption, IS = VCC f + ICC.
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MM74HC4538
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
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MM74HC4538
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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MM74HC4538 Dual Retriggerable Monostable Multivibrator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 10 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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